I am looking for motivated PhD students to join my group at the University of Toronto. If you are interested in working with me and are excited about security for hardware and systems, please reach out to me and apply to the UofT CS graduate program.
My research focuses on improving the security for computing hardware and systems. My research interests include cache side-channels, transient execution attacks, Rowhammer attacks, DRAM integrity, memory safety and fuzzing. Some of my research contributions include:
- Cache Side-Channels: Enabled the fastest known cache timing attacks , randomized cache defenses  that end an arms race, and one of the first academic hardware defenses against Spectre .
- DRAM Security: Enabled practical mitigations for DRAM Rowhammer attacks [4, 5] and designed secure memories [6, 7] for protection against physical attacks.
- Software Reliability: Enabled hardware support for low-cost memory safety  and fuzzing  to make software resilient to bugs causing a majority of current vulnerabilities.
My work has been awarded an IEEE HOST Best PhD Dissertation Award, an IEEE MICRO Top Picks Honorable Mention, and been supported in part by a GT IISP Cybersecurity Fellowship and a GT ECE Bourne Fellowship.
I received my PhD in Electrical and Computer Engineering at Georgia Tech, USA, while being advised by Prof. Moinuddin Qureshi, and received my B.Tech & M.Tech in Electrical Engineering from Indian Institute of Technology - Bombay, India.
|Sep, 2022||Serving as Co-Chair of the Artifact Evaluation Committee at ASPLOS 2023.|
|Aug, 2022||SQUIP attack (CVE-2021-46778), discovered with collaborators at TU Graz, is public. (techradar, toms hardware, hacker news, ...)|
|Jun, 2022||Awarded the Best PhD Dissertation Award at IEEE HOST 2022.|
|Mar, 2022||Invited to serve on the Program Committee (PC) for RAID 2022.|
|Nov, 2021||Our paper Randomized Row Swap, a principled Rowhammer mitigation accepted at ASPLOS 2022!|
|Oct, 2021||Invited to serve on the External Review Committee (ERC) for ISCA 2022.|
|May, 2021||Our paper on Mentoring in Computer Architecture is presented in WCAE at ISCA 2021.|
|May, 2021||Finalist in the Qualcomm Innovation Fellowship 2021!|
|Mar, 2021||Invited to serve on the Program Committee (PC) for IEEE S&P (Oakland) 2022.|
|Mar, 2021||Hardware Support for Fuzzing accepted at CCS 2021!|
|Mar, 2021||Recognized as Distinguished Reviewer in the Shadow PC of IEEE S&P (Oakland) 2021.|
|Feb, 2021||MIRAGE, a principled defense vs cache attacks accepted at USENIX Security 2021 [Github].|
|Jan, 2021||Streamline, the fastest cache covert-channel attack accepted at ASPLOS 2021 [Github].|
|Jan, 2021||Awarded Georgia Tech IISP Cybersecurity Fellowship!|
|Nov, 2020||Invited to present MIRAGE at IBM Research's Future of Comp-Arch Workshop 2020.|
|Apr, 2020||Selected to participate in the 8th Heidelberg Laureate Forum 2020.|
|Sep, 2019||Invited to present CleanupSpec at IBM Research's Future of Comp-Arch Workshop 2019.|
|Aug, 2019||CleanupSpec, our work on safe speculation is accepted at MICRO 2019 [Github].|
|May, 2019||Finalist in Qualcomm Innovation Fellowship 2019!|
|Jan, 2019||Our paper SYNERGY is awarded an Honorable Mention at IEEE MICRO's Top Picks 2019!|
|Dec, 2018||Finalist in Microsoft Research PhD Fellowship 2019!|
|Aug, 2018||Morphable Counters, our work on in-DRAM Merkle Trees is accepted at MICRO 2018 [Github].|
|Nov, 2017||SYNERGY, our work on co-designing DRAM integrity and reliability accepted at HPCA 2018!|
selected publications (full list)
- S&PSQUIP: Exploiting the Scheduler Queue Contention Side ChannelIn 44th IEEE Symposium on Security and Privacy (S&P) 2023
- MICROAQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at RuntimeIn 55th IEEE/ACM International Symposium on Microarchitecture 2022
- ISCAHydra: Enabling Low-Overhead Mitigation of Row-Hammer at Ultra-Low Thresholds via Hybrid TrackingIn 49th International Symposium on Computer Architecture (ISCA) 2022
- ASPLOSRandomized Row Swap: Mitigating Rowhammer Attacks by Breaking Spatial Correlation Between Aggressors and VictimsIn 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2022
- CCSHardware Support to Improve Fuzzing Performance and PrecisionIn 28th ACM Conference on Computer and Communications Security (CCS) 2021
- SECMIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative DesignIn 30th USENIX Security Symposium (USENIX Security) 2021
- ASPLOSStreamline: A Fast, Flushless Cache Covert-channel Attack by Enabling Asynchronous CollusionIn 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2021
- MICROCleanupspec: An "Undo" Approach to Safe SpeculationIn 52nd ACM/IEEE International Symposium on Microarchitecture (MICRO) 2019
- MICROMorphable Counters: Enabling Compact Integrity Trees for Low-Overhead Secure MemoriesIn 51st ACM/IEEE International Symposium on Microarchitecture (MICRO) 2018
- HPCASynergy: Rethinking Secure-memory Design for Error-Correcting MemoriesIn 24th IEEE International Symposium on High Performance Computer Architecture (HPCA) 2018Honorable Mention at IEEE MICRO’s Top Picks 2019