Conference

2025

  1. HPCA
    QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority Queues
    Jeonghyun Woo, Shaopeng (Chris) Lin, Prashant J Nair, Aamer Jaleel, and Gururaj Saileshwar
    In 31st IEEE International Symposium on High Performance Computer Architecture (HPCA) 2025

2024

  1. Arxiv
    Privacy Risks of Speculative Decoding in Large Language Models
    Jiankun Wei, Abdulrahman Abdulrazzag, Tianchen Zhang, Adel Muursepp, and Gururaj Saileshwar
    In arXiv:2411.01076 2024
    HTML
  2. ISCA
    PrIDE: Achieving Secure Rowhammer Mitigation with Low-Cost In-DRAM Trackers
    Aamer Jaleel, Gururaj Saileshwar, Steven Keckler, and Moinuddin Qureshi
    In 51st International Symposium on Computer Architecture (ISCA) 2024
    PDF Code

2023

  1. DSN
    PT-Guard: Integrity-Protected Page Tables to Defend Against Breakthrough Rowhammer Attacks
    Anish Saxena, Gururaj Saileshwar, Jonas Juffinger, Andreas Kogler, Daniel Gruss, and Moinuddin Qureshi
    In 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) 2023
    HTML PDF Slides
  2. S&P
    Practical Timing Side-Channel Attacks on Memory Compression
    Martin Schwarzl, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz, and Daniel Gruss
    In 44th IEEE Symposium on Security and Privacy (S&P) 2023
    HTML PDF Code
  3. S&P
    SQUIP: Exploiting the Scheduler Queue Contention Side Channel
    Stefan Gast, Jonas Juffinger, Martin Schwarzl, Gururaj Saileshwar, Andreas Kogler, Simone Franza, Markus Kostl, and Daniel Gruss
    In 44th IEEE Symposium on Security and Privacy (S&P) 2023
    HTML PDF Slides
  4. HPCA
    Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems
    Jeonghyun Woo, Gururaj Saileshwar, and Prashant J Nair
    In 29th IEEE International Symposium on High Performance Computer Architecture (HPCA) 2023
    HPCA’23 Best Paper Award
    HTML PDF Slides Code

2022

  1. MICRO
    AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime
    Anish Saxena, Gururaj Saileshwar, Prashant Nair, and Moinuddin Qureshi
    In 55th IEEE/ACM International Symposium on Microarchitecture (MICRO) 2022
    HTML PDF Slides Code
  2. ISCA
    Hydra: Enabling Low-Overhead Mitigation of Row-Hammer at Ultra-Low Thresholds via Hybrid Tracking
    Moinuddin Qureshi, Aditya Rohan, Gururaj Saileshwar, and Prashant Nair
    In 49th International Symposium on Computer Architecture (ISCA) 2022
    HTML PDF Slides
  3. DSN-S
    On the Scalability of HeapCheck
    Rick Boivie, Gururaj Saileshwar, Tong Chen, Benjamin Segal, and Alper Buyuktosunoglu
    In 52nd IEEE/IFIP International Conference on Dependable Systems and Networks-Supplement Vol.(DSN-S) 2022
    HTML Slides
  4. ASPLOS
    Randomized Row Swap: Mitigating Rowhammer Attacks by Breaking Spatial Correlation Between Aggressors and Victims
    Gururaj Saileshwar, Bolin Wang, Moinuddin Qureshi, and Prashant Nair
    In 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2022
    HTML PDF Slides Code

2021

  1. CCS
    Hardware Support to Improve Fuzzing Performance and Precision
    Ren Ding, Yonghae Kim, Fan Sang, Wen Xu, Gururaj Saileshwar, and Taesoo Kim
    In 28th ACM Conference on Computer and Communications Security (CCS) 2021
    HTML PDF Slides Code
  2. SEED
    Bespoke Cache Enclaves: Fine-Grained and Scalable Isolation from Cache Side-Channels via Flexible Set-Partitioning
    Gururaj Saileshwar, Sanjay Kariyappa, and Moinuddin Qureshi
    In IEEE International Symposium on Secure and Private Execution Environment Design (SEED) 2021
    PDF Slides Video
  3. SEC
    MIRAGE: Mitigating Conflict-Based Cache Attacks with a Practical Fully-Associative Design
    Gururaj Saileshwar, and Moinuddin Qureshi
    In 30th USENIX Security Symposium (USENIX Security) 2021
    HTML PDF Slides Video Code SIGARCH Blog
  4. DSN-S
    Hardware Support for Low-Cost Memory Safety
    Rick Boivie*, Gururaj Saileshwar*, Tong Chen, Benjamin Segal, and Alper Buyuktosunoglu
    In 51st IEEE/IFIP International Conference on Dependable Systems and Networks-Supplement Vol.(DSN-S) 2021
    *equal contribution lead authors
    HTML PDF Slides
  5. ASPLOS
    Streamline: A Fast, Flushless Cache Covert-channel Attack by Enabling Asynchronous Collusion
    Gururaj Saileshwar, Christopher W Fletcher, and Moinuddin Qureshi
    In 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) 2021
    HTML PDF Slides Video Code GT SCS News

2019

  1. MICRO
    Cleanupspec: An "Undo" Approach to Safe Speculation
    Gururaj Saileshwar, and Moinuddin K Qureshi
    In 52nd ACM/IEEE International Symposium on Microarchitecture (MICRO) 2019
    HTML PDF Slides Video Code

2018

  1. MICRO
    Morphable Counters: Enabling Compact Integrity Trees for Low-Overhead Secure Memories
    Gururaj Saileshwar, Prashant J Nair, Prakash Ramrakhyani, Wendy Elsasser, Jose A Joao, and Moinuddin K Qureshi
    In 51st ACM/IEEE International Symposium on Microarchitecture (MICRO) 2018
    HTML PDF Slides Video Code
  2. HPCA
    Synergy: Rethinking Secure-memory Design for Error-Correcting Memories
    Gururaj Saileshwar, Prashant J Nair, Prakash Ramrakhyani, Wendy Elsasser, and Moinuddin K Qureshi
    In 24th IEEE International Symposium on High Performance Computer Architecture (HPCA) 2018
    Honorable Mention at IEEE MICRO’s Top Picks 2019
    HTML PDF Slides Video Code

2011

  1. ISOCC
    CMOS Low-noise Signal Conditioning with a Novel Differential “Resistance to Frequency” Converter for Resistive Sensor Applications
    Priyanka Kabara, Sanket Thakur, Gururaj Saileshwar, Maryam S Baghini, and Dinesh K Sharma
    In 8th IEEE International SoC Design Conference (ISOCC) 2011
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Journal

2023

  1. CAL
    The Mirage of Breaking MIRAGE: Analyzing the modeling pitfalls in emerging “attacks” on MIRAGE
    Gururaj Saileshwar, and Moinuddin Qureshi
    In IEEE Computer Architecture Letters (CAL) 2023
    HTML PDF
  2. CAL
    Mitigating Timing-Based NoC Side-Channel Attacks With LLC Remapping
    Anurag Kar, Xueyang Liu, Yonghae Kim, Gururaj Saileshwar, Hyesoon Kim, and Tushar Krishna
    In IEEE Computer Architecture Letters (CAL) 2023
    HTML PDF

2022

  1. TACO
    HeapCheck: Low-Cost Hardware-Support for Memory-Safety
    Gururaj Saileshwar, Rick Boivie, Tong Chen, Benjamin Segal, and Alper Buyuktosunoglu
    In ACM Transactions on Architecture and Code Optimization (TACO) 2022
    HTML PDF

Workshop

2021

  1. WCAE
    Mentoring Opportunities in Computer Architecture: Analyzing the Past to Develop the Future
    Elba Garza, Gururaj Saileshwar, Udit Gupta, Tianyi Liu, Abdulrahman Mahmoud, Saugata Ghose, and Joel Emer
    In 21st Workshop on Computer Architecture Education (WCAE) held in conjunction with ISCA 2021
    Received Highest Reviewer Scores in the Workshop
    HTML PDF Slides Video

Technical Reports

2021

  1. Arxiv
    Practical Timing Side Channel Attacks on Memory Compression
    Martin Schwarzl, Pietro Borrello, Gururaj Saileshwar, Hanna Müller, Michael Schwarz, and Daniel Gruss
    arXiv preprint arXiv:2111.08404 2021
    arXiv

2019

  1. Arxiv
    Lookout for Zombies: Mitigating Flush+Reload Attack on Shared Caches by Monitoring Invalidated Lines
    Gururaj Saileshwar, and Moinuddin K Qureshi
    arXiv preprint arXiv:1906.02362 2019
    arXiv

Patents

2021

  1. Hybrid Mitigation of Speculation Based Attacks Based on Program Behavior
    Gururaj Saileshwar, and Muntaquim Chowdhury
    US Patent App. 16/681,642 2021
  2. Speculative Information Flow Tracking
    Gururaj Saileshwar, and Muntaquim Chowdhury
    US Patent App. 16/669,027 2021

2020

  1. Memory Organization for Security and Reliability
    Gururaj Saileshwar, Prakash S Ramrakhyani, and Wendy Elsasser
    US Patent 10,540,297 2020